[vc_empty_space][vc_empty_space]
Towards new real-time processor: The multioperand MSB-first real-time adder
Kuspriyantoa, Kerlooza Y.Y.b
a Lab. of Computer and Control System, Dept. of Electrical Engineering, Bandung Institute of Technology, Indonesia
b Hardware Laboratory, Dept. of Computer Engineering, Indonesian Computer University, Indonesia
[vc_row][vc_column][vc_row_inner][vc_column_inner][vc_separator css=”.vc_custom_1624529070653{padding-top: 30px !important;padding-bottom: 30px !important;}”][/vc_column_inner][/vc_row_inner][vc_row_inner layout=”boxed”][vc_column_inner width=”3/4″ css=”.vc_custom_1624695412187{border-right-width: 1px !important;border-right-color: #dddddd !important;border-right-style: solid !important;border-radius: 1px !important;}”][vc_empty_space][megatron_heading title=”Abstract” size=”size-sm” text_align=”text-left”][vc_column_text]Arithmetic operation’s execution time in real-time system is bounded by deadlines. The method commonly used to meet these deadlines is by employing any suitable process-scheduling algorithm, which may contain a potential weakness. If time needed to operate is longer than its deadline, then the result’s quality will be poor. This is mainly caused by the algorithms of the arithmetic operations commonly used nowadays do not choose the most significant data to be processed first. This research tries to design new algorithm and its processing unit that works based on real-time principles, which starts its computation process from the highest valued digit and provides its intermediate-results that can be accessed anytime during the process. Designing tool used in this research is MAX+plus II Baseline 10.2 software. This research accomplishes in showing the performance of the new algorithm and its processing unit, which is better than the performance of the conventional algorithm.[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Author keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Intermediate results,MSB-first algorithm,Real time processors,Sequential algorithms[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Indexed keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Intermediate result,Msb-first algorithm,Real-time,Sequential algorithm[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Funding details” size=”size-sm” text_align=”text-left”][vc_column_text][/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”DOI” size=”size-sm” text_align=”text-left”][vc_column_text]https://doi.org/10.1109/DSD.2004.1333321[/vc_column_text][/vc_column_inner][vc_column_inner width=”1/4″][vc_column_text]Widget Plumx[/vc_column_text][/vc_column_inner][/vc_row_inner][/vc_column][/vc_row][vc_row][vc_column][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][/vc_column][/vc_row]