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Effeciency enhancement in embedded system design using UML 2.0 and TLM modeling
Abdurohman M.a, Kuspriyantob, Sutikno S.b, Sasongko A.b
a Informatic Departement, IT Telkom, Indonesia
b Electrical Departement, Bandung Institut of Technology, Indonesia
[vc_row][vc_column][vc_row_inner][vc_column_inner][vc_separator css=”.vc_custom_1624529070653{padding-top: 30px !important;padding-bottom: 30px !important;}”][/vc_column_inner][/vc_row_inner][vc_row_inner layout=”boxed”][vc_column_inner width=”3/4″ css=”.vc_custom_1624695412187{border-right-width: 1px !important;border-right-color: #dddddd !important;border-right-style: solid !important;border-radius: 1px !important;}”][vc_empty_space][megatron_heading title=”Abstract” size=”size-sm” text_align=”text-left”][vc_column_text]One of early processes in an embedded system designing is system modeling. A modeling is performed to get preliminary figure of a product before it could be implemented in form of a prototype. Generally speaking, an embed system designing processes comprise five stages: product specifications, HW/SW separation. detailed HW/SW designing, integration and testing. The final output is in form of detailed RTL. After the RTL has been completed, the improvement processes could be started. This paper proposes a new designing process by performing UML-based preliminary designing and TLM preliminary process before detailed HW/SW designing. The correction processes would be performed only under the TML Model. It is expected that by this method we could perform the overall designing processes faster than the conventional method. We use SystemC as a modeling Language. © 2010 IEEE.[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Author keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Conventional methods,Designing process,Embedded system design,Modeling languages,Product specifications,RTL,System designing,System modeling,SystemC,TML,UML,UML 2.0[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Indexed keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Embedded system,RTL,SystemC,TML,UML[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Funding details” size=”size-sm” text_align=”text-left”][vc_column_text][/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”DOI” size=”size-sm” text_align=”text-left”][vc_column_text]https://doi.org/10.1109/ICCET.2010.5486336[/vc_column_text][/vc_column_inner][vc_column_inner width=”1/4″][vc_column_text]Widget Plumx[/vc_column_text][/vc_column_inner][/vc_row_inner][/vc_column][/vc_row][vc_row][vc_column][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][/vc_column][/vc_row]