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A DSP implementation of a voice transcoder for VoIP gateways
a Department of Electrical Engineering, IURC Microelectronics, Bandung Institute of Technology, West Java, 40132, Indonesia
[vc_row][vc_column][vc_row_inner][vc_column_inner][vc_separator css=”.vc_custom_1624529070653{padding-top: 30px !important;padding-bottom: 30px !important;}”][/vc_column_inner][/vc_row_inner][vc_row_inner layout=”boxed”][vc_column_inner width=”3/4″ css=”.vc_custom_1624695412187{border-right-width: 1px !important;border-right-color: #dddddd !important;border-right-style: solid !important;border-radius: 1px !important;}”][vc_empty_space][megatron_heading title=”Abstract” size=”size-sm” text_align=”text-left”][vc_column_text]© 2002 IEEE.The objective of this research is to design and implement high-quality speech compression in real-time on a single-chip transcoder system. Based on voice over Internet protocol (VoIP) requirements, we have decided to implement multipulse maximum, likelihood quantization (MP-MLQ) and algebraic code excited linear prediction (ACELP) (used in an ITU-T G.723.1 standard) on a DSP processor TMS320C5402. The goal is to implement a high quality speech coding (with signal-to-noise ratio, SNR of more than 10 dB), at a low bit rate of 8 kbit/s or less. The coder must have a delay not more than 100 ms. Furthermore the resulting system must be shown to fit within a single chip. Using an ITU-T reference code, we use a series of iterative code optimization efforts. This rapid development approach is successful in achieving the requirements in a three man-month effort. The program requires 58-73 MIPS computation and 39 Kword memory, thus fits within the single chip of a 100 MIPS TMS320C5409. Total delay time is 59.4 ms. The bit rates are as low as 5.3 kbit/s and 6.3 kbit/s, with SNRs of 11.52 dB and 12.72 dB, respectively.[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Author keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Bit rates,Delay,Digital signal processing chips,Quantization,Space technologies[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Indexed keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Bit rate,Delay,Digital signal processing,Digital signal processing chips,Internet telephony,Phase change materials,Pulse modulation,Quantization,Space technology,Speech coding[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Funding details” size=”size-sm” text_align=”text-left”][vc_column_text][/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”DOI” size=”size-sm” text_align=”text-left”][vc_column_text]https://doi.org/10.1109/APCCAS.2002.1114932[/vc_column_text][/vc_column_inner][vc_column_inner width=”1/4″][vc_column_text]Widget Plumx[/vc_column_text][/vc_column_inner][/vc_row_inner][/vc_column][/vc_row][vc_row][vc_column][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][/vc_column][/vc_row]