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KRISNA: Cryptoprocessor architecture for national smart card
Santriaji M.H.a, Sasongko A.a
a School of Electrical Engineering and Informatics, Institut Teknologi, Bandung, Indonesia
[vc_row][vc_column][vc_row_inner][vc_column_inner][vc_separator css=”.vc_custom_1624529070653{padding-top: 30px !important;padding-bottom: 30px !important;}”][/vc_column_inner][/vc_row_inner][vc_row_inner layout=”boxed”][vc_column_inner width=”3/4″ css=”.vc_custom_1624695412187{border-right-width: 1px !important;border-right-color: #dddddd !important;border-right-style: solid !important;border-radius: 1px !important;}”][vc_empty_space][megatron_heading title=”Abstract” size=”size-sm” text_align=”text-left”][vc_column_text]© 2016 IEEE.Smart card technology has already widely used in Indonesia. Security threat on smart card is growing rapidly, therefore more security is needed. Ironically, Indonesia as one of the smart card most users very dependent on foreign technology and haven’t built its own smart card architecture. This paper presents KRISNA, a cryptoprocessor architecture for national smart card. KRISNA has an ability to maintain the runtime of the smart card operation system by using 8051 architectural system as the main control. KRISNA uses a selection of lightweight implementation of cryptograpyc algorithm that can be implemented in smart card environment system. KRISNA has BC3 64-bit as symmetric cryptography, ECC 233-bit as asymmetric cryptography, WELL 2512 as pseudo random number generator and also SHA256 as hash function. KRISNA also accelerates the communication between the main controller and the coprocessor by implementing instruction buffer and shared memory controller.[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Author keywords” size=”size-sm” text_align=”text-left”][vc_column_text]Architectural systems,Asymmetric cryptography,Crypto-Processor architecture,Environment systems,Pseudo random number generators,Sha-256,Smart-card technology,Symmetric cryptography[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Indexed keywords” size=”size-sm” text_align=”text-left”][vc_column_text]BC3,Cryptoprocessor Architecture,ECC,PRNG WELL,SHA256,smart card[/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”Funding details” size=”size-sm” text_align=”text-left”][vc_column_text][/vc_column_text][vc_empty_space][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][vc_empty_space][megatron_heading title=”DOI” size=”size-sm” text_align=”text-left”][vc_column_text]https://doi.org/10.1109/ICITISEE.2016.7803039[/vc_column_text][/vc_column_inner][vc_column_inner width=”1/4″][vc_column_text]Widget Plumx[/vc_column_text][/vc_column_inner][/vc_row_inner][/vc_column][/vc_row][vc_row][vc_column][vc_separator css=”.vc_custom_1624528584150{padding-top: 25px !important;padding-bottom: 25px !important;}”][/vc_column][/vc_row]